The Paros Operating System Microkernel

This paper describes the concepts and rationale of Paros, an operating system microkernel specifically targeted to distributed memory parallel computers. The Paros microkernel has been designed to provide dynamic support for general purpose parallel applications and operating systems under the distributed memory programming model. Fine grain parallelism in machines with large numbers of nodes is directly supported by Paros. The ability to support efficiently many users and different environments concurrently has been one of the objectives of the design. A prototype implementation on transputer based machines has been implemented. The system offers fast and flexible resource management mechanisms and policies. This characteristics make Paros an important research tool for both application developers and system programmers on topics such as process mappings, load balance, communication delays, overheads and subsystems as file servers. One of our objectives is to support systems in which good balance between individual application speed and global throughput are compromised to acceptable levels and thus achieve good utilization of all the components in a parallel machine. Applications both at source and binary level have been ported from different transputer programming environments to Paros with little effort , achieving good performance and higher throughput than in the original system. A good example is the implementation of a parallel make. SUMMARY This paper describes the concepts and rationale of Paros, an operating system microkernel specifically targeted to distributed memory parallel computers. The Paros microkernel has been designed to provide dynamic support for general purpose parallel applications and operating systems under the distributed memory programming model. Fine grain parallelism in machines with large numbers of nodes is directly supported by Paros. The ability to support efficiently many users and different environments concurrently has been one of the objectives of the design. A prototype implementation on transputer based machines has been implemented.